This invention relates generally to computer memory, and more particularly to providing constrained transmission and storage in a random access memory.
Significant impairments to signal integrity can occur on an electrical parallel bus when certain data patterns occur. For example, simultaneous switching of a large fraction of data inputs is a significant source of noise in a single-ended transmission bus. Reducing the number of transitions can reduce noise as well as have a positive effect on transmission power consumption.
It would be desirable to be able to incorporate constrained coding and also optionally, error control coding in the data that travels through a bus connected to a random access memory (RAM) (e.g., a memory comprised of dynamic random access memory (DRAM) devices). The use of constrained coding to reduce the number of transitions would improve the signal integrity and/or signaling power consumption in the bus. The error control coding could be utilized to protect against failures in the storage memory, and potentially also against transmission errors.